发明名称 |
Stacked bi-layer as the low power switchable RRAM |
摘要 |
Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. The resistive switching nonvolatile memory cells may include a first layer disposed. The first layer may be operable as a bottom electrode. The resistive switching nonvolatile memory cells may also include a second layer disposed over the first layer. The second layer may be operable as a resistive switching layer that is configured to switch between a first resistive state and a second resistive state. The resistive switching nonvolatile memory cells may include a third layer disposed over the second layer. The third layer may be operable as a resistive layer that is configured to determine, at least in part, an electrical resistivity of the resistive switching nonvolatile memory element. The third layer may include a semi-metallic material. The resistive switching nonvolatile memory cells may include a fourth layer that may be operable as a top electrode. |
申请公布号 |
US9246094(B2) |
申请公布日期 |
2016.01.26 |
申请号 |
US201314140683 |
申请日期 |
2013.12.26 |
申请人 |
Intermolecular, Inc. |
发明人 |
Wang Yun;Nardi Federico;Weling Milind |
分类号 |
H01L47/00;H01L45/00;H01L27/24 |
主分类号 |
H01L47/00 |
代理机构 |
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代理人 |
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主权项 |
1. A resistive switching nonvolatile memory element comprising:
a first layer formed on a substrate,
wherein the first layer is a current steering element comprising one or more nitrides; a second layer formed over the first layer,
wherein the second layer is a resistive switching layer; a third layer formed over the second layer,
wherein the third layer is a resistive layer having a substantially constant resistance, andwherein the third layer comprises a semi-metallic material,
wherein the semi-metallic material is, at least in part, amorphous,wherein the semi-metallic material is more than 0% and less than 5% crystalline by volume; and a fourth layer formed over the third layer, wherein the fourth layer is a top electrode; wherein the second layer directly interfaces the first layer and the third layer; and wherein the third layer directly interfaces the second layer and the fourth layer. |
地址 |
San Jose CA US |