发明名称 Apparatus and method for improved modulation and coding schemes for broadband satellite communications systems
摘要 Modulation and coding schemes are provided for improved performance of wireless communications systems to support services and applications for terminals with operational requirements at relatively low Es/N0 ratios. The new modulation and coding schemes provide new BCH codes, low density parity check (LDPC) codes and interleaving methods.
申请公布号 US9246634(B2) 申请公布日期 2016.01.26
申请号 US201313890643 申请日期 2013.05.09
申请人 Hughes Network Systems, LLC 发明人 Eroz Mustafa;Lee Lin-Nan
分类号 H03M13/00;H04L1/00;H03M13/11;H03M13/25;H03M13/27;H03M13/29;H03M13/15 主分类号 H03M13/00
代理机构 Potomac Technology Law, LLC 代理人 Potomac Technology Law, LLC
主权项 1. A method comprising: encoding, by an encoder of a wireless communications terminal, a sequence of information bits of a source data signal based on a predetermined structured parity check matrix of a Low Density Parity Check (LDPC) code, wherein the encoding is performed based on frames of the sequence of information bits, each frame being of a length of kldpc information bits (i0, i1 . . . , ikldpc−1), and the output of the encoding comprises coded LDPC frames each being nldpc coded bits in length, and wherein the structured parity check matrix is represented by tabular information of a format wherein each row represents occurrences of one values within a respective column of the parity check matrix, and the columns of the parity check matrix are derived according to a predetermined operation based on the respective rows of the tabular information, and wherein the tabular information comprises a one of Tables 1a through 1d (below); wherein the encoding comprises generating nldpc−kldpc parity bits (p0, p1, . . . , pnldpc−kldpc−1) for each frame of the sequence of information bits, wherein the generation of the parity bits comprises: initializing parity bit accumulators for p0, p1, . . . , pnldpc−kldpc−1 to zero;accumulating information bit i0 at parity bit accumulator addresses specified in the first row of the table;for the next group of m−1 information bits, iy (y=1, 2, . . . , m−1), accumulating each information bit at parity bit accumulator addresses {x+(y mod m)*q} mod (nldpc−kldpc), wherein x denotes an address of a parity bit accumulator corresponding to the information bit i0, and q is a code-rate dependent constant (q=(nldpc−k)/m), and wherein m is a code-dependent constant and k=R*n (where R is the code rate);accumulating im at parity bit accumulator addresses specified in the second row of the table, and, in a similar manner as for the group of m−1 information bits (above), accumulating each information bit of the next group of m−1 information bits iz, z=(m+1, m+2, . . . , 2m) at {x+(z mod m)*q} mod (nldpc−kldpc), wherein x denotes the address of the parity bit accumulator corresponding to the information bit im (the entries of the second row of the table);in a similar manner, for each subsequent group of m information bits, accumulating the information bits at parity bit addresses based on a next row of the table; andafter all of the information bits of the frame are accumulated, performing operations according to pi=pi⊕pi-1, wherein for i=1, 2, . . . , (nldpc−kldpc−1), each pi resulting from the operation for a given i is equal to the parity bit pi;TABLE 1aAddress of Parity Bit Accumulators (Rate 11/45) (nldpc = 16200)9054 9186 12155 1000 7383 6459 2992 4723 8135 112502624 9237 7139 12238 11962 4361 5292 10967 11036 81052044 11996 5654 7568 7002 3549 4767 8767 2872 83456966 8473 5180 8084 3359 5051 9576 5139 1893 9023041 3801 8252 11951 909 8535 1038 8400 3200 45855291 10484 10872442 7516 372011469 769 1099810575 1436 29356905 8610 112851873 5634 6383TABLE 1bAddress of Parity Bit Accumulators (Rate 14/45) (nldpc = 16200)1606 3617 7973 6737 9495 4209 9209 4565 4250 7823 9384 4004105 991 923 3562 3892 10993 5640 8196 6652 4653 9116 76776348 1341 5445 1494 7799 831 4952 5106 3011 9921 6537 84767854 5274 8572 3741 5674 11128 4097 1398 5671 7302 8155 26416548 2103 590 5749 5722 10 2682 1063 633 2949 207 60652828 6366 4766 399 935 7611 84 150 31465363 7455 71409297 482 48488458 1631 53445729 6767 483611019 4463 38824107 9610 545411137 4328 63073260 7897 3809TABLE 1cAddress of Parity Bit Accumulators (Rate 26/45) (nldpc = 16200)6106 5389 698 6749 6294 1653 1984 2167 6139 6095 3832 2468 61154202 2362 1852 1264 3564 6345 498 6137 3908 3302 527 2767 66673422 1242 1377 2238 2899 1974 1957 261 3463 4994 215 23383016 5109 6533 2665 5300 4908 4967 5787 726 229 1970 27896146 5765 6649 2871 884 1670 2597 5058 3659 6594 5042 3045521 2811 0 4214 2626 2211 1236 3771 852 6356 6797 34631523 1830 3938 5593 2128 5791 3421 3680 6692 1377 3808 34755551 6035 2247 3662 759 6783 116 6380 4586 3367 1 50033518 6557 65101830 839 44215431 5959 61523174 5113 45205399 1303 24962841 741 2202731 1830 41931875 3935 2239 4720 4233107 2676 8401950 6177 64574091 94 51021907 6050 3455714 3 559502 4268 41641019 5558 2716127 854 3221959 5337 2735TABLE 1dAddress of Parity Bit Accumulators (Rate 32/45) (nldpc = 16200)2686 655 2308 1603 336 1743 2778 1263 3555 185 4212 621286 2994 2599 2265 126 314 3992 4560 2845 2764 2540 14762670 3599 2900 2281 3597 2768 4423 2805 836 130 1204 41621884 4228 1253 2578 3053 3650 2587 4468 2784 1644 1490 46554258 1699 4363 4555 3810 4046 3806 344 2459 4067 3327 35101021 2741 2528 2168 2820254 1080 6161465 4192 29722356 2976 15344412 1937 27241430 3024 6001952 2136 35733009 3123 12884553 2299 8062997 402 43303302 4567 6982364 498 31461809 647 9923512 32 43011238 251 4501657 737 641560 1720 28931689 2206 9023998 1784 20942090 3126 12011565 764 3473891 903 24132286 2900 23483026 2033 15022404 1243 556308 2222 38251523 3311 389;and wherein the encoding processes the source data signal for transmission over a wireless communications channel.
地址 Germantown MD US