发明名称 High quality factor inductor and high quality factor filter in package substrate or printed circuit board (PCB)
摘要 A package substrate (or printed circuit board) that includes at least one dielectric layer, a first inductor structure is at least partially located in the dielectric layer, a third interconnect, and a second inductor structure. The first inductor structure includes a first interconnect, a first via coupled to the first interconnect, and a second interconnect coupled to the first via. The third interconnect is coupled to the first inductor structure. The third interconnect is configured to provide an electrical path for a ground signal. The second inductor structure is at least partially located in the dielectric layer. The second inductor is coupled to the third interconnect. The second inductor structure includes a fourth interconnect, a second via coupled to the fourth interconnect, and a fifth interconnect coupled to the second via. The first and second inductor structures are configured to operate with a capacitor as a 3rd harmonic suppression filter.
申请公布号 US9247647(B1) 申请公布日期 2016.01.26
申请号 US201414484000 申请日期 2014.09.11
申请人 QUALCOMM Incorporated 发明人 Yoon Jung Ho;Zhang Xiaonan;Lee Jong-Hoon;Song Young Kyu;Jow Uei-Ming
分类号 H01L29/00;H05K1/18;H01L23/498;H01L49/02;H03H7/01 主分类号 H01L29/00
代理机构 Loza & Loza, LLP 代理人 Loza & Loza, LLP
主权项 1. A package substrate comprising: at least one dielectric layer; a first inductor structure at least partially located in the dielectric layer, the first inductor structure comprising: a first interconnect;a first via coupled to the first interconnect; anda second interconnect coupled to the first via; a third interconnect coupled to the first inductor structure, the third interconnect configured to provide an electrical path for a ground signal; and a second inductor structure at least partially located in the dielectric layer, the second inductor coupled to the third interconnect, the second inductor structure comprising: a fourth interconnect;a second via coupled to the fourth interconnect; anda fifth interconnect coupled to the second via.
地址 San Diego CA US