Methods of forming substantially defect-free, fully-strained silicon-germanium fins for a FinFET semiconductor device

摘要

One illustrative method disclosed herein includes, among other things, performing an epitaxial deposition process to form an epi SiGe layer above a recessed layer of insulating material and on an exposed portion of a fin, wherein the concentration of germanium in the layer of epi silicon-germanium (SixGe1-x) is equal to or greater than a target concentration of germanium for the final fin, performing a thermal anneal process in an inert processing environment to cause germanium in the epi SiGe to diffuse into the fin and thereby define an SiGe region in the fin, after performing the thermal anneal process, performing at least one process operation to remove the epi SiGe and, after removing the epi SiGe, forming a gate structure around at least a portion of the SiGe region.

主权项

1. A method, comprising:
forming a plurality of trenches in a silicon substrate to thereby define a fin; forming a recessed layer of insulating material in said plurality of trenches, the recessed surface of said layer of insulating material exposing an upper portion of said fin; performing an epitaxial deposition process to form a layer of epi silicon-germanium (SixGe1-x) above said recessed layer of insulating material and on the exposed portion of said fin, wherein the concentration of germanium in said layer of epi silicon-germanium (SixGe1-x) ranges from 25-100%; performing a thermal anneal process in an inert processing environment to cause germanium in said layer of epi silicon-germanium (SixGe1-x) to diffuse into said fin and thereby define a substantially defect-free silicon-germanium region in said fin; after performing said thermal anneal process, performing at least one process operation to remove said layer of epi silicon-germanium (SixGe1); after removing said layer of epi silicon-germanium (SixGe1-x), recessing said layer of insulating material to expose at least a portion of said silicon-germanium region; and forming a gate structure around at least a portion of the exposed silicon-germanium region.