发明名称 PACKAGE-ON-PACKAGE OPTIONS WITH MULTIPLE LAYER 3-D STACKING
摘要 In some embodiments, a semiconductor device package on package assembly may include a first package, a second package, and a third package. The first package may include a first surface, a second surface, a first die, and a first set of electrical conductors. The first set of electrical conductors may be configured to electrically connect the package on package assembly. The second package may include a third surface and a fourth surface, and a local memory module. The third surface may be coupled to the second surface. The first package may be electrically coupled to the second package. The third package may include a fifth surface and a sixth surface, and a main memory module. The fifth surface may be coupled to the fourth surface. The third package may be electrically coupled to the first package and/or the second package.
申请公布号 WO2016010859(A1) 申请公布日期 2016.01.21
申请号 WO2015US40013 申请日期 2015.07.10
申请人 APPLE INC. 发明人 ZHAI, JUN;HU, KUNZHONG;ZHONG, CHONGHUA
分类号 H01L25/10;G11C5/02;H01L25/18 主分类号 H01L25/10
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