| 主权项 |
1. A delay circuit comprising:
units each of which comprises:
a first delay element which has a first input node and a first output node,a second delay element which has a second input node and a second output node, anda third delay element between the first delay element and the second delay element, wherein the first output node of the first delay element of a first unit of the units is connected to the first input node of the first delay element of a second unit of the units, the second input node of the second delay element of the first unit is connected to the second output node of the second delay element of the second unit, and a signal on the first input node of the first delay element of the first unit is output from the second output node of the second delay element of the first unit through the third delay element of the second unit. |
