发明名称 Method And System For A Low Input Voltage Low Impedance Termination Stage For Current Inputs
摘要 A low input voltage low impedance termination stage for current inputs is disclosed and may include an output stage for an electrical circuit, the output stage including input cascode transistors and stacked output transistors, wherein a source-follower feedback path for the input cascode transistors may include a feedback transistor with its gate terminal coupled to a drain terminal of a first of the input cascode transistors, a drain of the feedback transistor coupled to a supply voltage, and a source terminal of the feedback transistor coupled to a current source. A current source may be coupled to the drain of the first of the input cascode transistors. The supply voltage may be coupled to the stacked output transistors via a load resistor. The input cascode transistors, the feedback transistor, and the stacked output transistors may include complementary metal-oxide semiconductor (CMOS) transistors.
申请公布号 US2016020780(A1) 申请公布日期 2016.01.21
申请号 US201514865582 申请日期 2015.09.25
申请人 Maxlinear, Inc. 发明人 Zele Rajesh;Chandra Gaurav
分类号 H03M1/66 主分类号 H03M1/66
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