发明名称 |
STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH HIGH EFFICIENCY THERMAL PATHS AND ASSOCIATED SYSTEMS |
摘要 |
Semiconductor die assemblies having high efficiency thermal paths. In one embodiment, a semiconductor die assembly comprises a package support substrate, a first semiconductor die electrically mounted to the package support substrate, and a plurality of second semiconductor dies. The first die has a stacking site and a peripheral region extending laterally from the stacking site, and the bottom second semiconductor die is attached to the stacking site of the first die. The assembly further includes (a) a thermal transfer structure attached to the peripheral region of the first die that has a cavity in which the second dies are positioned and an inlet, and (b) an underfill material in the cavity. The underfill material has a fillet between the second semiconductor dies caused by injecting the underfill material into the cavity through the inlet port of the casing. |
申请公布号 |
WO2016010703(A1) |
申请公布日期 |
2016.01.21 |
申请号 |
WO2015US37630 |
申请日期 |
2015.06.25 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
VADHAVKAR, SAMEER, S.;LI, XIAO;GANDHI, JASPREET, S. |
分类号 |
H01L25/065;H01L23/28;H01L23/48 |
主分类号 |
H01L25/065 |
代理机构 |
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代理人 |
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地址 |
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