| 摘要 |
PROBLEM TO BE SOLVED: To provide an electronic apparatus with a reset function capable of easily, reliably, and safely resetting and reactivating a CPU of the electronic apparatus through simple operation.SOLUTION: An FPGA 3 comprising a key scan circuit 31 and a reset circuit 32 is externally mounted on an electronic apparatus 1, and a key panel 2 and a CPU 4 are communicatively connected. When the CPU 4 is normally operating, the FPGA 3 and the CPU 4 transmit and receive key scan information through key operation. On the other hand, if communication with the CPU 4 is not performed after the elapse of a certain time after depressing a key 21, a reset signal is transmitted from the FPGA 3 to the CPU 4 and the CPU 4 is reset by depressing a prescribed key 21A which is set in the CPU 4 in advance and stored in the FPGA 3. |
