发明名称 SHIFT REGISTER AND FLAT PANEL DISPLAY USING THE SAME
摘要 A shift register and flat panel display using the same is provided therein. The shift register receives an operating voltage level. Through the circuit provided by the shift register, a driving voltage of an output-stage transistor is higher than prior art. Thus, the shift register has an enhanced driving ability.
申请公布号 US2016019976(A1) 申请公布日期 2016.01.21
申请号 US201414486100 申请日期 2014.09.15
申请人 Au Optronics Corp. 发明人 PAI CHENG-CHIU;CHUANG MING-HUNG
分类号 G11C19/28;G09G5/00 主分类号 G11C19/28
代理机构 代理人
主权项 1. A shift register, configured to receive a previous-stage output signal, a start signal, a first clock signal, a second clock signal and a third clock signal, the shift register comprising: a control module, comprising: an input unit, comprising an activate terminal, the input unit being configured to determine whether to transmit the start signal to the activate terminal or not according to the previous-stage output signal;a first control unit, comprising a first driving control terminal, the first control unit being electrically coupled to the activate terminal and configured to determine the first driving control terminal to receive a first operating voltage level or a second operating voltage level according to the voltage level of the activate terminal and the third clock signal; anda second control unit, comprising a second driving control terminal, the second control unit being electrically coupled to the activate terminal and the first driving control terminal, the second control unit being configured to determine how to adjust the voltage level received by the activate terminal according to the voltage level of the first driving control terminal and the second clock signal and then provide the adjusted voltage level to the second driving control terminal; and a driving module, comprising: an output terminal;a driving voltage level determination unit, comprising a driving voltage level output terminal, the driving voltage level determination unit being electrically coupled to the first driving control terminal and the second driving control terminal, the driving voltage level determination unit being configured to determine whether to turn on an electrical channel between the driving voltage level output terminal and a specific node or not according to the voltage level of the first driving control terminal and determine whether to turn on an electrical channel between the driving voltage level output terminal and the second operating voltage level or not according to the voltage level of the second driving control terminal;a first driving unit, electrically coupled to the first driving control terminal and the output terminal, the first driving unit being configured to determine whether to turn on an electrical channel between the output terminal and the first operating voltage level or not according to the voltage level of the first driving control terminal; anda second driving unit, electrically coupled to the driving voltage level output terminal and the output terminal, the second driving unit being configured to determine whether to transmit the first clock signal to the output terminal or not according to the voltage level of the driving voltage level output terminal.
地址 Hsin-Chu TW