| 发明名称 |
VECTOR SCALING INSTRUCTIONS FOR USE IN AN ARITHMETIC LOGIC UNIT |
| 摘要 |
At least one processor may receive components of a vector, wherein each of the components of the vector comprises at least an exponent. The at least one processor may further determine a maximum exponent out of respective exponents of the components of the vector, and may determine a scaling value based at least in part on the maximum exponent. An arithmetic logic unit of the at least one processor may scale the vector, by subtracting the scaling value from each of the respective exponents of the components of the vector. |
| 申请公布号 |
US2016019027(A1) |
申请公布日期 |
2016.01.21 |
| 申请号 |
US201414331991 |
申请日期 |
2014.07.15 |
| 申请人 |
QUALCOMM Incorporated |
发明人 |
Chen Lin;Gruber Andrew Evan;Jiao Guofang;Ho Chiente;Argade Pramod Vasant |
| 分类号 |
G06F5/01 |
主分类号 |
G06F5/01 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method for scaling a vector, the method comprising:
receiving, by at least one processor, components of a vector, wherein each of the components of the vector comprises at least an exponent; determining, by the at least one processor, a maximum exponent out of respective exponents of the components of the vector; determining a scaling value based at least in part on the maximum exponent; and scaling, by an arithmetic logic unit (ALU) of the at least one processor, the vector by subtracting the scaling value from each of the respective exponents of the components of the vector. |
| 地址 |
San Diego CA US |
