发明名称 CHIP CROSS-SECTION IDENTIFICATION AND RENDERING ANALYSIS
摘要 A defective integrated circuit (IC) is analyzed to identify a portion of the integrated circuit possibly containing an electrical defect. A computer is used to process the design information of the integrated circuit and to navigate to the physical portion of the integrated circuit where the potential electrical defect might be found. The design information includes information on the layout and the technology used to fabricate the integrated circuit. A three-dimensional view of the portion of the design of the integrated circuit where the electrical defect might be found is rendered, based on the design information for the integrated circuit.
申请公布号 US2016019331(A1) 申请公布日期 2016.01.21
申请号 US201514867822 申请日期 2015.09.28
申请人 Synopsys, Inc. 发明人 Lin Xi-Wei;Oberai Ankush
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项 1. A computer-implemented method for circuit analysis comprising: identifying a portion of a semiconductor chip based on a layout for a design for the semiconductor chip; generating virtual cuts for a cross section of the layout; and rendering, using one or more processors, a three-dimensional view of the portion that was identified using the virtual cuts that were generated.
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