发明名称 半導体素子搭載用パッケージ基板の製造方法
摘要 <P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a package substrate for mounting a semiconductor element which enables a flip chip connection terminal to be formed with secured adhesion in spite of its fine structure, deals with the densification by supplying an amount of solder requiring for the flip-chip connection with a bump of the semiconductor element at high accuracy, and achieves high reliability. <P>SOLUTION: A manufacturing method of a package substrate includes: a process (A) where a flip chip connection terminal is formed by an embedded circuit 2 having an upper surface exposed on an insulation layer 3; a process (B) where solder particles 7 held on sheets 5, 6 are pressed against the flip chip connection terminal and heat and pressure are applied thereon; a process (C) where the solder particles are moved to the flip chip connection terminal to eliminate the sheets; and a process (D) where the solder particles moved to the flip chip connection terminal is reflowed. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP5846407(B2) 申请公布日期 2016.01.20
申请号 JP20110078584 申请日期 2011.03.31
申请人 日立化成株式会社 发明人 田村 匡史;川崎 沙織;若林 昭彦;鈴木 邦司;坪松 良明
分类号 H01L21/60;H01L23/12 主分类号 H01L21/60
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