发明名称 |
DUAL BOOT SYSTEM WITH MEMORY AREA SWAPPING MECHANISM |
摘要 |
<p>A central processing unit with dual boot capabilities is disclosed comprising an instruction memory further comprising a first and second memory area which are configured to be individually programmable, wherein first and second memory area can be assigned to an active memory from which instructions are executed and an inactive memory, respectively. The instruction set for the central processing unit comprises a dedicated instruction that allows to perform a swap from the an active memory area to an inactive memory area, wherein the swap is performed by executing the dedicated instruction in the active memory followed by a program flow change instruction in the active memory, whereupon the inactive memory becomes the new active memory and the active memory becomes the new inactive memory and execution of instructions continues in the new active memory.</p> |
申请公布号 |
EP2972823(A1) |
申请公布日期 |
2016.01.20 |
申请号 |
EP20140719941 |
申请日期 |
2014.03.13 |
申请人 |
MICROCHIP TECHNOLOGY INCORPORATED |
发明人 |
CATHERWOOD, MICHAEL, I.;IVEY, BRANT;WOJEWODA, IGOR;MICKEY, DAVID;KANELLOPOULOS, JOSEPH |
分类号 |
G06F9/445;G06F9/44 |
主分类号 |
G06F9/445 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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