发明名称 |
MEMORY INTERFACE OFFSET SIGNALING |
摘要 |
A memory interface includes circuitry configured for applying a variable delay to a portion of a data signal and applying a variable delay to a data strobe. The delayed data strobe samples the delayed portion of the data signal. Delayed portions of the data signal are spaced away from non-delayed portions of the data signal by alternating the routing of delayed bits and non-delayed bits of the data signal. A training block determines and sets a value of the variable delay corresponding to a largest value of a number of recorded eye aperture widths. |
申请公布号 |
EP2972918(A1) |
申请公布日期 |
2016.01.20 |
申请号 |
EP20140719158 |
申请日期 |
2014.03.13 |
申请人 |
QUALCOMM INCORPORATED |
发明人 |
PANDEY, SHREE, KRISHNA;CHUN, DEXTER, T. |
分类号 |
G06F13/16;G06F13/42;H03K19/003 |
主分类号 |
G06F13/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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