| 摘要 |
An integrated circuit device may have an internal oscillator for generating a system clock, a trimming logic with a trimming register for adjusting an oscillation frequency of the internal oscillator; a serial data receiver, wherein a serial data stream includes a synchronization signal. The synchronization signal is operable to indicate that the system clock correct, too fast or too slow. The device may further have a circuit for decoding the synchronization signal operable to re-adjust a value stored in the trimming register upon evaluation of the synchronization signal. |
