发明名称 DIGITAL CONVERGENCE DEVICE
摘要 PURPOSE:To make unnecessar a complicated interpolation arithmetic circuit, and to adjust a convergence dislocation rapidly and with accuracy, by performing the approximate calculation of a correction data corresponding to a scanning line between adjusting points in a vertical direction, and providing a 1 frame memory which storage the correction data at the adjusting point, and between the adjusting points in the vertical direction. CONSTITUTION:Since only the correction data of a position corresponding to the adjusting point is written in a 1 frame memory (RAM) 4, it is necessary to write the correction data at every M-number of scanning lines included between the adjusting points in the vertical direction by finding it with the approximate calculation. Then, for example, a change share by every scanning line between the adjusting points is found from a correction quantity (a) on the first line, and a correction quantity (b) on the second line, and the correction quantity by every scanning line is found by adding the change share with the correction quantity on the second line. Next, the output signals of the 1 frame memory (RAM)4 are converted to analog quantities with D/A converters 5-8 for each color, and are smoothed at low-pass filters (L.P.F) 9-12, and after being amplified at amplifiers 13-16, they are supplied to convergence yokes for each color.
申请公布号 JPS62193476(A) 申请公布日期 1987.08.25
申请号 JP19860035929 申请日期 1986.02.20
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YAMAMOTO KAZUYASU
分类号 H04N9/28 主分类号 H04N9/28
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