Method for manufacturing array substrate by forming common electrode connecting NMOS in display area and PMOS in drive area

摘要

A method for manufacturing an array substrate includes: forming a shielding layer, an insulating buffer layer, active layers, a gate insulating layer and NMOS gate electrodes in a display area and a drive area on a substrate in sequence; forming a PMOS gate electrode in the drive area on the foregoing substrate, in which the NMOS gate electrodes and the PMOS gate electrode are provided on the same layer; meanwhile forming a first through hole in a common electrode connecting area, in which the first through hole is configured to connect the shielding layer and a source/drain electrode layer; forming an intermediate insulating layer on the foregoing substrate, forming a second through hole in the common electrode connecting area and third through holes in the display area and the drive area, in which the second through hole is formed at a same position as the first through hole and configured to connect the shielding layer and a source/drain electrode layer, and the third through holes are configured to connect the active layers and the source/drain electrode layer; and forming the source/drain electrode layer on the foregoing substrate.

主权项

1. A method for manufacturing an array substrate, comprising:
forming a shielding layer, an insulating buffer layer, a first active layer and a second active layer, a gate insulating layer and an NMOS gate electrode in a display area on a substrate in sequence, and implanting phosphorous ions into the first active layer; forming a PMOS gate electrode in the drive area on the gate insulating layer, in which the NMOS gate electrodes and the PMOS gate electrode are provided on tile same layer; meanwhile forming a first through hole in a common electrode connecting area, in which the first through hole is configured to connect the shielding layer and a source/drain electrode layer; and implanting boron ions into the second active layer; forming an intermediate insulating layer on the substrate, and forming a second through hole in the common electrode connecting area and third through holes in the display area and the drive area, in which the second through hole is formed at a same position as the first through hole and configured to connect the shielding layer and a source/drain electrode layer, and the third through holes are configured to connect the active layers and the source/drain electrode layer; and forming the source/drain electrode layer on the substrate, in which the source/drain electrode layer is connected with the shielding layer and the active layers through the second through hole and the third through holes.