Apparatus and method to reduce power delivery noise for partial writes

摘要

Apparatus, systems, and methods to reduce power delivery noise for partial writes are described. In one embodiment, an apparatus comprises a processor and a memory control logic to insert one or more dummy unit intervals into data in a write operation when a number of state transitions between adjacent unit intervals exceeds a threshold. Other embodiments are also disclosed and claimed.

主权项

1. An apparatus comprising:
a processor; and a memory control logic to:
insert one or more dummy unit intervals into data in a write operation when a number of state transitions between adjacent unit intervals exceeds a threshold;associate one or more data mask bits with each of the one or more dummy unit intervals, wherein the one or more data mask bits serves as a signal to a controller that the data in the dummy unit intervals is not to be written to memory; andtransmit the one or more data mask bits on a communication bus with the one or more dummy unit intervals.