Semiconductor arrangement with stress release and thermal insulation

摘要

Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided herein. A semiconductor arrangement comprises a cap wafer, a microelectromechanical systems (MEMS) wafer, and a complementary metal-oxide-semiconductor (CMOS) wafer. The cap wafer comprises one or more spring structures, such as a first spring structure and a second spring structure. The first spring structure and the second spring structure relieve stress as portions of the semiconductor arrangement, such as a membrane and a poly layer, move. An ambient pressure chamber is formed between the CMOS wafer and the MEMS wafer, such as for CMOS outgassing relief. One or more thermal insulator structures are formed between the CMOS wafer and the MEMS wafer to protect the MEMS wafer from heat originating from the CMOS wafer.

主权项

1. A semiconductor arrangement, comprising:
a complementary metal-oxide-semiconductor (CMOS) wafer; a microelectromechanical systems (MEMS) wafer formed over the CMOS wafer, the MEMS wafer comprising a high vacuum chamber configured as a sensing gap between a membrane of the MEMS wafer and a poly layer of the MEMS wafer; a cap wafer formed over the MEMS wafer; and an ambient pressure chamber formed between the MEMS wafer and the cap wafer.