| 摘要 |
An IEEE1588 clock synchronization method, system and apparatus based on an E1 link, which are used for improving precision of clock synchronization. In the method, a second conversion device keeping clock synchronization with a slave clock device determines a link delay from a first conversion device to the second conversion device according to a time point t2 of each timestamp t1 in multiple received E1 packets, receives a link delay, sent by the first conversion device keeping clock synchronization with a maser clock, from the second conversion device to the first conversion device, and performs time synchronization on a clock of the slave clock device according to the determined link delay between the first conversion device and the second conversion device. Because clock synchronization is performed by the second conversion device keeping clock synchronization with the slave clock, timestamps are attached to ingoing and outgoing synchronization packets at the conversion device, and a link delay is determined by sending multiple E1 packets carrying timestamps, so that the influence caused by a delay jitter of the E1 link is avoided, and precision of clock synchronization is improved. |
