| 发明名称 |
APPARATUS AND METHOD FOR CLOCK SYNCHRONIZATION FOR INTER-DIE SYNCHRONIZED DATA TRANSFER |
| 摘要 |
Described is an apparatus for clock synchronization. The apparatus comprises a pair of interconnects; a first die including a first phase interpolator having an output coupled to one of the interconnects; and a second die, wherein the pair of interconnects is to couple the first die to the second die. |
| 申请公布号 |
US2016013799(A1) |
申请公布日期 |
2016.01.14 |
| 申请号 |
US201414326788 |
申请日期 |
2014.07.09 |
| 申请人 |
LI SHENGGAO;RUSU STEFAN |
发明人 |
LI SHENGGAO;RUSU STEFAN |
| 分类号 |
H03L7/091;G06F13/40;H01L23/48 |
主分类号 |
H03L7/091 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A processor comprising:
a pair of interconnects; a first die including:
a first phase interpolator having an output coupled to one of the interconnects; anda delay estimator coupled to the pair of interconnects; and a second die, wherein the pair of interconnects is to couple the first die to the second die. |
| 地址 |
Pleasanton CA US |
