发明名称 N-CHANNEL AND P-CHANNEL FINFET CELL ARCHITECTURE WITH INTER-BLOCK INSULATOR
摘要 A finFET block architecture includes a first set of semiconductor fins having a first conductivity type, and a second set of semiconductor fins having a second conductivity type. An inter-block insulator is placed between outer fins of the first and second sets. A patterned gate conductor layer includes a first plurality of gate traces extending across the set of fins in the first block without crossing the inter-block insulator, and a second plurality of gate traces extending across the set of fins in the second block without crossing the inter-block insulator. Patterned conductor layers over the gate conductor layer are arranged in orthogonal layout patterns, and include an inter-block connector arranged to connect gate traces in the first and second blocks.
申请公布号 EP2737523(A4) 申请公布日期 2016.01.13
申请号 EP20120819516 申请日期 2012.07.23
申请人 SYNOPSYS, INC. 发明人 KAWA, JAMIL;MOROZ, VICTOR;SHERLEKAR, DEEPAK
分类号 H01L21/77;G06F17/50;H01L21/28;H01L21/336;H01L23/528;H01L27/02;H01L27/092;H01L27/12;H01L29/78 主分类号 H01L21/77
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