发明名称 Padless via
摘要 One disclosed embodiment comprises formation of a padless via in a substrate. The padless via includes a hole through a metal layer blanketing the substrate, as well as the underlying substrate. An inner wall of the padless via hole receives a seed layer of a conductive material. Electrolytic differential plating is then performed, resulting in a preferential accumulation of a conductive plating material on the via inner wall, relative to that deposited on a surface of the substrate. In one embodiment, the differential plating is performed by addition of an organic suppressant to a plating bath.
申请公布号 US9237651(B2) 申请公布日期 2016.01.12
申请号 US201414565383 申请日期 2014.12.09
申请人 BROADCOM CORPORATION 发明人 Zhang Tonglong
分类号 H01L21/44;H05K1/11;H05K3/42;H05K1/09;H05K1/18 主分类号 H01L21/44
代理机构 McDermott Will & Emery LLP 代理人 McDermott Will & Emery LLP
主权项 1. A padless via in a substrate, the padless via comprising: a via hole having an inner wall, the inner wall having a conductive lining, the conductive lining defining an inner conductive ring at a surface of the substrate, the conductive lining comprising a seed layer on a surface of the inner wall and a differentially-plated plating layer on a surface of the seed layer, wherein the inner conductive ring is in direct electrical contact with conductive tracings on the surface of the substrate, wherein at least one of the conductive tracings comprises a blanket metal layer on the surface of the substrate, the seed layer on a surface of the blanket metal layer, and the differentially-plated plating layer on the surface of the seed layer, and wherein a thickness of the differentially-plated plating layer of the conductive tracing is different from a thickness of the differentially-plated plating layer of the conductive lining.
地址 Irvine CA US