发明名称 DIVIDING CIRCUIT, ENCODING DEVICE, DECODING DEVICE, METHOD FOR CONTROLLING DIVIDING CIRCUIT, AND PROGRAM
摘要 PROBLEM TO BE SOLVED: To reduce the capacity of a storage unit in a dividing circuit.SOLUTION: A polynomial selection unit selects one of a plurality of input polynomial expressions each comprising a common factor and a partial polynomial expression, and supplies the partial polynomial expression in the selected input polynomial expression. A designation unit designates one of a plurality of first factors generated by factorization performed on the common factor in the selected input polynomial expression and one of a plurality of second factors each time an input polynomial expression is selected. A polynomial multiplication unit acquires a first remainder corresponding to the designated first factor and a second remainder corresponding to the designated second factor each time an input polynomial expression is selected, multiplies each of the first and second remainders and the supplied partial polynomial expression together, and supplies the result of multiplication. A polynomial addition unit adds up all of the supplied results of multiplication, and supplies the result of addition. A polynomial division unit performs a prescribed division on the result of addition, and outputs the result of division.
申请公布号 JP2016004468(A) 申请公布日期 2016.01.12
申请号 JP20140125252 申请日期 2014.06.18
申请人 SONY CORP 发明人 IKETANI RYOJI;SAKAI RUI
分类号 G06F17/10;G06F7/535 主分类号 G06F17/10
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