Circuit for driving gate of power MOS transistor

摘要

A circuit for driving a gate of a power MOS transistor includes an adaptive pull-up unit and an adaptive pull-down unit. The adaptive pull-up unit is connected between a first power source voltage and the gate of the power MOS transistor. The adaptive pull-up unit maximizes pull-up current driving ability. The adaptive pull-down unit is connected between a second power source voltage and the gate of the power MOS transistor. The adaptive pull-down unit maximizes pull-down current driving ability.

主权项

1. A circuit for driving a gate of a power metal oxide semiconductor MOS transistor, the circuit comprising:
an adaptive pull-up unit connected between a first power source voltage and the gate of the power MOS transistor, the adaptive pull-up unit configured to maximize pull-up current driving ability when a drain-source voltage of the power MOS transistor falls equal to or less than a threshold voltage of the power MOS transistor while a falling transition slope of the power MOS transistor is being driven in a multistage scheme by increasing the pull-up current driving ability stepwisely in response to a leading edge of a gate driving pulse; and an adaptive pull-down unit connected between a second power source voltage and the gate of the power MOS transistor, the adaptive pull-down unit configured to maximize pull-down current driving ability when a gate source voltage of the power MOS transistor falls equal to or less than the threshold voltage of the power MOS transistor while a rising transition slope of the power MOS transistor is being driven in a multistage scheme by increasing the pull-down current driving ability stepwisely in response to a trailing edge of the gate driving pulse.