3-dimensional stack memory device

摘要

A 3-dimensional stack memory device includes a semiconductor substrate, a stacked active pattern configured so that a plurality of stripe shape active regions and insulation layers are stacked alternatively over the semiconductor substrate, a gate electrode formed in the stacked active pattern, a source and drain formed at both sides of the gate electrode in each of the plurality of active regions, a bit line formed on one side of the drain to be connected to the drain, a resistive device layer formed on one side of the source to be connected to the source, and a source line connected to the resistive device layer. The source is configured of an impurity region having a first conductivity type, and the drain is configured of an impurity region having a second conductivity type different from the first conductivity type.

主权项

1. A stack memory device, comprising:
a semiconductor substrate; a stacked active pattern configured so that a plurality of stripe shape active regions and insulation layers are stacked alternatively over the semiconductor substrate; a gate electrode formed in the stacked active pattern; a source and drain formed at both sides of the gate electrode in each of the plurality of active regions; a bit line formed on one side of the drain to be connected to the drain; a resistive device layer formed on one side of the source to be connected to the source; and a source line connected to the resistive device layer, wherein the source is configured of an impurity region having a first conductivity type, and the drain is configured of an impurity region having a second conductivity type different from the first conductivity type.