发明名称 |
Predicting outcomes for memory requests in a cache memory |
摘要 |
The described embodiments include a cache controller with a prediction mechanism in a cache. In the described embodiments, the prediction mechanism is configured to perform a lookup in each table in a hierarchy of lookup tables in parallel to determine if a memory request is predicted to be a hit in the cache, each table in the hierarchy comprising predictions whether memory requests to corresponding regions of a main memory will hit the cache, the corresponding regions of the main memory being smaller for tables lower in the hierarchy. |
申请公布号 |
US9235514(B2) |
申请公布日期 |
2016.01.12 |
申请号 |
US201313736254 |
申请日期 |
2013.01.08 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
Loh Gabriel H.;Sim Jaewoong |
分类号 |
G06F12/00;G06F12/08 |
主分类号 |
G06F12/00 |
代理机构 |
Park, Vaughan, Fleming & Dowler LLP |
代理人 |
Park, Vaughan, Fleming & Dowler LLP |
主权项 |
1. A method for operating a cache, comprising:
in a prediction mechanism, performing operations for:
performing a lookup in each table in a hierarchy of lookup tables in parallel to determine if a memory request is predicted to be a hit in the cache, each table in the hierarchy comprising predictions whether memory requests to corresponding regions of a main memory will hit in the cache, each of the regions in a given table including a corresponding number of addresses in the main memory, wherein the regions include a smaller number of addresses in the main memory for each table lower in the hierarchy. |
地址 |
Sunnyvale CA US |