发明名称 Junction field-effect transistor with raised source and drain regions formed by selective epitaxy
摘要 Junction field-effect transistors and design structures for a junction field-effect transistor. A source and a drain of the junction field-effect transistor are comprised of a semiconductor material grown by selective epitaxy and in direct contact with a top surface of a semiconductor layer. A gate is formed that is aligned with a channel laterally disposed in the semiconductor layer between the source and the drain. The source, the drain, and the semiconductor layer are each comprised of a second semiconductor material having an opposite conductivity type from a first semiconductor material comprising the gate.
申请公布号 US9236499(B2) 申请公布日期 2016.01.12
申请号 US201414496285 申请日期 2014.09.25
申请人 GLOBALFOUNDRIES INC. 发明人 Chan Kevin K.;Ellis-Monaghan John J.;Harame David L.;Liu Qizhi;Pekarik John J.
分类号 H01L29/808;H01L29/732;H01L29/66;H01L29/737;H01L29/10;H01L27/06;G06F17/50;H01L29/16;H01L29/161;H01L29/08;H01L29/165 主分类号 H01L29/808
代理机构 Thompson Hine LLP 代理人 Thompson Hine LLP ;Canale Anthony J.
主权项 1. A junction field-effect transistor comprising: a plurality of trench isolation regions surrounding a device region of a substrate; a semiconductor layer on the device region and the trench isolation regions, the semiconductor layer including a first region on the device region, a second region on the trench isolation regions, and a channel in the first region of the semiconductor layer, the first region of the semiconductor layer having a top surface, and the first region of the semiconductor layer having a greater thickness than the second region of the semiconductor layer; a first gate on the top surface of the first region of the semiconductor layer, the first gate separated from the device region by the first region of the semiconductor layer; a second gate in the device region, the second gate aligned with the first gate so that the channel is disposed between the first gate and the second gate; a source in contact with the top surface of the first region of the semiconductor layer; and a drain in contact with the top surface of the first region of the semiconductor layer, wherein the source and the drain are raised relative to the top surface of the semiconductor layer, the channel is aligned with the first gate and positioned laterally between the source and the drain, the first gate is comprised of a first semiconductor material, the source, the drain, and the semiconductor layer are each comprised of a second semiconductor material having an opposite conductivity type from the first semiconductor material, and the source and the drain have an epitaxial relationship with the semiconductor layer.
地址 Grand Cayman KY