Insulated gate bipolar transistor (IGBT) electrostatic discharge (ESD) protection devices

摘要

Insulated gate bipolar transistor (IGBT) electrostatic discharge (ESD) protection devices are presented. An IGBT-ESD device includes a semiconductor substrate and patterned insulation regions disposed on the semiconductor substrate defining a first active region and a second active region. A high-V N-well is formed in the first active region of the semiconductor substrate. A P-body doped region is formed in the second active region of the semiconductor substrate, wherein the high-V N-well and the P-body doped region are separated with a predetermined distance exposing the semiconductor substrate. A P+ doped drain region is disposed in the high-V N-well. A P+ diffused region and an N+ doped source region are disposed in the P-body doped region. A gate structure is disposed on the semiconductor substrate with one end adjacent to the N+ doped source region and the other end extending over the insulation region.

主权项

1. An insulated gate bipolar transistor electrostatic discharge (IGBT-ESD) protection device, comprising:
a P-type semiconductor substrate; a high-voltage N-well formed in the P-type semiconductor substrate; a patterned insulation region disposed on the high-voltage N-well defining a first active region and a second active region; a P-type double diffused region disposed in the first active region of the high-voltage N-well; a single P+ doped drain region disposed in the P-type double diffused region; a P-body doped region formed in the second active region of the high-voltage N-well, wherein the P-type double diffused region and the P-body doped region are separated with a predetermined distance exposing the high-voltage N-well; a pair of N+ and P+ doped source regions disposed in the P-body doped region; and a gate structure disposed on the high-voltage N-well with one end adjacent to the N+ doped source region and with the other end extending over the patterned insulation region, wherein the P-body doped region is separated from the P-type semiconductor substrate only by the high-voltage N-well, and wherein the N+ doped source region is located between the gate structure and the P+ doped source region.