Data receiver and fail-safe circuit

摘要

A data receiver has a reception circuit and a fail-safe circuit. The reception circuit has an input amplifier, a logic signal processing circuit, and a reception stop control circuit. The fail-safe circuit has a high-pass filter, a comparator, and a pulse width extending circuit. The reception circuit receives a serial data of differential input signals based on a predetermined standard, converts the serial data into a serial data of a single-ended output signal, and outputs a converted serial data. The fail-safe circuit detects whether the differential input signals have a nonstandard small amplitude and outputs a fail-safe detection signal indicating a detection result.

主权项

1. A data receiver comprising:
a reception circuit that receives a serial data of differential input signals based on a predetermined standard, converts the serial data into a serial data of a single-ended output signal, and outputs a converted serial data; and a fail-safe circuit that detects whether the differential input signals have a nonstandard small amplitude, and outputs a fail-safe detection signal indicating a detection result thereof, wherein the reception circuit comprises: an input amplifier portion that receives the serial data of the differential input signals, converts the serial data into the serial data of the single-ended output signal, and outputs the converted serial data; a logic signal processing circuit that processes the converted serial data; and a reception stop control circuit that disables the input amplifier and the logic signal processing circuit when the fail-safe circuit detects that the differential input signals have nonstandard small amplitude in response to the fail-safe detection signal, and wherein the fail-safe circuit comprises: a high-pass filter that removes DC components from the differential input signals and outputs a high voltage input signal and a low voltage input signal respectively corresponding to the differential input signals; a comparator that compares a voltage level of the high voltage input signal with a voltage level of the low voltage input signal, and outputs a comparison result signal indicating a comparison result thereof; and a pulse width extending circuit that extends a pulse width of a voltage level of the comparison result signal indicating that the voltage level of the high voltage input signal is lower than the voltage level of the low voltage input signal, by a predetermined period of time, and outputs an obtained signal as the fail-safe detection signal.