发明名称 Semiconductor Device Having Features to Prevent Reverse Engineering
摘要 A ROM circuit includes a first N channel transistor having an output and having device geometry and device characteristics adapted to bias the output at a predetermined level when a P channel circuit is connected to the first N channel transistor; a pass transistor connected between the output and a data bus, the pass transistor connected to a word line, the word line adapted to turn ON the pass transistor when the word line is asserted; and the P channel circuit connected to the data bus and adapted to provide leakage current to charge a gate in the first N channel transistor when pass transistor is turned ON.
申请公布号 US2016005485(A1) 申请公布日期 2016.01.07
申请号 US201514856919 申请日期 2015.09.17
申请人 Verisiti, Inc. 发明人 Thacker, III William Eli
分类号 G11C16/26;G11C16/04 主分类号 G11C16/26
代理机构 代理人
主权项 1. A ROM circuit comprising: a first transistor having an output and having device geometry and device characteristics adapted to bias the output at a predetermined level indicating a binary 1 or a binary 0 when a circuit is connected to the first transistor through a pass transistor; the pass transistor connected between the output and a data bus, the pass transistor connected to a word line, the word line adapted to turn ON the pass transistor when the word line is asserted; and the circuit connected to the data bus and adapted to provide leakage current to charge a gate in the first transistor when pass transistor is turned ON.
地址 Sanford NC US