| 发明名称 |
MEMORY DEVICES AND PROGRAMMING MEMORY ARRAYS THEREOF |
| 摘要 |
An embodiment of a method includes decreasing a difference of a voltage applied to a first select gate minus a voltage applied to a source while the first select gate is off, decreasing a difference of a voltage applied to a second select gate minus a voltage applied to a data line while the second select gate is off, and increasing a voltage of a signal applied to a selected access line that is coupled to an untargeted memory cell in a string of memory cells coupled to the first and second select gates to a program voltage after or substantially concurrently with decreasing the difference of the voltage applied to the first select gate minus the voltage applied to the source and with decreasing the difference of the voltage applied to the second select gate minus the voltage applied to the data line. |
| 申请公布号 |
US2016005474(A1) |
申请公布日期 |
2016.01.07 |
| 申请号 |
US201514857475 |
申请日期 |
2015.09.17 |
| 申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
Goda Akira;Liu Haitao;Parat Krishna |
| 分类号 |
G11C16/10;G11C16/04 |
主分类号 |
G11C16/10 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A memory device, comprising:
a memory array; and control logic; wherein the control logic is configured to decrease a difference of a voltage applied to a first select gate of the memory array minus a voltage applied to a source of the memory array coupled to the first select gate while the first select gate is off; wherein the control logic is configured to decrease a difference of a voltage applied to a second select gate of the memory array minus a voltage applied to a data line coupled to the second select gate while the second select gate is off; and wherein the control logic is configured to increase a voltage of a signal applied to a selected access line that is coupled to an untargeted memory cell, not targeted for programming, in a string of memory cells of the memory array coupled to the first and second select gates to a program voltage after or substantially concurrently with decreasing the difference of the voltage applied to the first select gate minus the voltage applied to the source and after or substantially concurrently with decreasing the difference of the voltage applied to the second select gate minus the voltage applied to the data line. |
| 地址 |
BOISE ID US |
