发明名称 |
INTEGRATED CIRCUIT WITH SELF-VERIFICATION FUNCTION, VERIFICATION METHOD AND METHOD FOR GENERATING A BIST SIGNATURE ADJUSTMENT CODE |
摘要 |
An integrated circuit includes a Built-In Self-Test (BIST) circuit, a predetermined signature pattern and a Read Only Memory (ROM), wherein the predetermined signature pattern is stored in the integrated circuit. The ROM stores at least effective information and a BIST signature adjustment code, the BIST signature adjustment code is irrelevant to any functional information stored in the ROM; wherein the BIST circuit is used to test content stored in the ROM to generate a signature pattern, and compare the signature pattern with the predetermined signature pattern to judge if the content stored in the ROM has error. |
申请公布号 |
US2016003903(A1) |
申请公布日期 |
2016.01.07 |
申请号 |
US201514753032 |
申请日期 |
2015.06.29 |
申请人 |
Realtek Semiconductor Corp. |
发明人 |
Weng Chi-Shun;Kuo Chun-Yi |
分类号 |
G01R31/3177 |
主分类号 |
G01R31/3177 |
代理机构 |
|
代理人 |
|
主权项 |
1. An integrated circuit, comprising:
a Built-In Self-Test (BIST) circuit; a predetermined signature pattern stored in the integrated circuit previously; and a Read Only Memory (ROM) which stores at least effective information and a BIST signature adjustment code, wherein the BIST signature adjustment code is irrelevant to any functional information stored in the ROM; wherein the BIST circuit tests content stored in the ROM to generate a signature pattern, and compares the signature pattern with the predetermined signature pattern to determine whether the content stored in the ROM has error or not. |
地址 |
HsinChu TW |