发明名称 |
ELECTRONIC DEVICE INCLUDING A SEMICONDUCTOR MEMORY |
摘要 |
This technology provides an electronic device. An electronic device in accordance with an implementation of this document includes semiconductor memory, and the semiconductor memory includes a contact plug; a first stack structure disposed over the contact plug and coupled to the contact plug, wherein the first stack structure includes a pinning layer controlling a magnetization of a pinned layer; and a second stack structure disposed over the first stack structure and coupled to the first stack structure, wherein the second stack structure includes a MTJ (Magnetic Tunnel Junction) structure which includes the pinned layer having a pinned magnetization direction, a free layer having a variable magnetization direction, and a tunnel barrier layer interposed between the pinned layer and the free layer, wherein a width of the first stack structure is larger than a width of the contact plug and a width of the second stack structure. |
申请公布号 |
US2016005953(A1) |
申请公布日期 |
2016.01.07 |
申请号 |
US201414502979 |
申请日期 |
2014.09.30 |
申请人 |
SK hynix Inc. |
发明人 |
Lee Min-Suk |
分类号 |
H01L43/02;G11C11/16;G06F12/08;H01L43/08 |
主分类号 |
H01L43/02 |
代理机构 |
|
代理人 |
|
主权项 |
1. An electronic device comprising semiconductor memory, wherein the semiconductor memory includes:
a contact plug; a first stack structure disposed over the contact plug and coupled to the contact plug, wherein the first stack structure includes a pinning layer controlling a magnetization of a pinned layer; and a second stack structure disposed over the first stack structure and coupled to the first stack structure, wherein the second stack structure includes a MTJ (Magnetic Tunnel Junction) structure which includes a pinned layer having a pinned magnetization direction, a free layer having a variable magnetization direction, and a tunnel barrier layer interposed between the pinned layer and the free layer, wherein a width of the first stack structure is greater than a width of the contact plug and a width of the second stack structure. |
地址 |
Icheon-si KR |