发明名称 SUBDIVISION OF A FUSED COMPOUND ARITHMETIC OPERATION
摘要 A microprocessor prepares a fused multiply-accumulate operation of a form ±A*B±C for execution by issuing first and second multiply-accumulate microinstructions to one or more instruction execution units to complete the fused multiply-accumulate operation. The first multiply-accumulate microinstruction causes an unrounded nonredundant result vector to be generated from a first accumulation of a selected one of (a) the partial products of A and B or (b) C with the partial products of A and B. The second multiply-accumulate microinstruction causes performance of a second accumulation of C with the unrounded nonredundant result vector, if the first accumulation did not include C. The second multiply-accumulate microinstruction also causes a final rounded result to be generated from the unrounded nonredundant result vector, wherein the final rounded result is a complete result of the fused multiply-accumulate operation.
申请公布号 US2016004508(A1) 申请公布日期 2016.01.07
申请号 US201514749088 申请日期 2015.06.24
申请人 VIA ALLIANCE SEMICONDUCTOR CO., LTD 发明人 ELMER THOMAS
分类号 G06F7/483;G06F9/30;G06F7/544 主分类号 G06F7/483
代理机构 代理人
主权项 1. A method in a microprocessor for preparing for execution of a fused multiply-accumulate operation of a form ±A*B±C, wherein A, B and C are input operands, and wherein no rounding occurs before C is accumulated to a product of A and B, the method comprising: issuing first and second multiply-accumulate microinstructions to one or more instruction execution units to complete the fused multiply-accumulate operation; wherein the first multiply-accumulate microinstruction causes an unrounded nonredundant result vector to be generated from a first accumulation of a selected one of (a) the partial products of A and B or (b) C with the partial products of A and B; wherein the second multiply-accumulate microinstruction causes performance of a second accumulation of C with the unrounded nonredundant result vector, if the first accumulation did not include C; and wherein the second multiply-accumulate microinstruction also causes a final rounded result to be generated from the unrounded nonredundant result vector, wherein the final rounded result is a complete result of the fused multiply-accumulate operation.
地址 Shanghai CN
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