发明名称 SERIES FERROELECTRIC NEGATIVE CAPACITOR FOR MULTIPLE TIME PROGRAMMABLE (MTP) DEVICES
摘要 Implementations of the technology described herein provide a Multiple Time Programmable (MTP) device, such as a Flash memory device, that implements a coupling gate in series with a floating gate. The coupling gate includes a ferroelectric capacitor and a conventional capacitor. The ferroelectric capacitor in combination with the coupling gate provides a negative capacitance such that the total capacitance of the combination of the floating gate and the coupling gate is larger than it would be if the coupling gate included only a conventional capacitor. One advantage of this device is that the effective coupling ratio between the coupling gate and the floating gate is increased. Another advantage is that the floating gate drops more voltage than conventional Multiple Time Programmable (MTP) devices.
申请公布号 US2016005749(A1) 申请公布日期 2016.01.07
申请号 US201414321593 申请日期 2014.07.01
申请人 QUALCOMM Incorporated 发明人 LI Xia;YANG Bin;PERRY Daniel Wayne
分类号 H01L27/115;H01L49/02;H01L21/28 主分类号 H01L27/115
代理机构 代理人
主权项 1. A multiple time programmable memory, comprising: a negative capacitor; and a first transistor having a floating gate, wherein the floating gate is coupled in series with the negative capacitor.
地址 San Diego CA US