发明名称 LINER AND BARRIER APPLICATIONS FOR SUBTRACTIVE METAL INTEGRATION
摘要 Methods and techniques for manufacturing metal interconnect parts, lines, or vias by subtractive etching and liner deposition methods are provided. The methods involve the following steps of: depositing a blanket copper layer; removing regions of the blanket copper layer to form a pattern; treating the patterned metal; depositing a copper-dielectric interface material such that the copper-dielectric interface material adheres only to the patterned copper; depositing a dielectric barrier layer on the substrate; and depositing a dielectric bulk layer on the substrate.
申请公布号 KR20160002393(A) 申请公布日期 2016.01.07
申请号 KR20150092073 申请日期 2015.06.29
申请人 램 리써치 코포레이션 发明人 우 후이-정;나이즐리 토마스 조셉;샹카르 나그라지;센 메이후아;호앙 존;샤르마 프리투
分类号 H01L21/768;H01L21/283;H01L21/3213;H01L49/02 主分类号 H01L21/768
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