发明名称 OTP READ SENSOR ARCHITECTURE WITH IMPROVED RELIABILITY
摘要 Circuits and methods for reading an OTP memory cell with improved reliability. To read a first OTP memory cell, a first current amount generated by a second, programmed, OTP memory cell is received. A second current amount generated by a third, unprogrammed, OTP memory cell is received. Current generated by the first OTP memory cell is sunk. The amount of current sunk from the first OTP memory cell is equal to a sum of a third current amount that is proportional to the first current amount plus a fourth current amount that is proportional to the second current amount. While sinking said current from the first OTP memory cell a voltage at a current output of the first OTP memory cell is compared to a threshold voltage.
申请公布号 US2016005492(A1) 申请公布日期 2016.01.07
申请号 US201514789666 申请日期 2015.07.01
申请人 Texas Instruments Incorporated 发明人 Barsilai Mandy
分类号 G11C17/08 主分类号 G11C17/08
代理机构 代理人
主权项 1. A one-time programmable (OTP) memory cell read circuit comprising: an OTP bit memory element operable to store a data bit; a programmed-on OTP reference cell operable to generate a first reference current; a first current mirror having a first input coupled to receive the first reference current, and having a second input coupled to a current output of the OTP bit memory element and operable to sink current from the OTP bit memory element, wherein the amount of current the first current mirror sinks from the OTP bit memory element is proportional to the first reference current; a programmed-off OTP reference cell operable to generate a second reference current; a second current mirror having a first input coupled to receive the second reference current, and having a second input coupled to the current output of the OTP bit memory element and operable to sink current from the OTP bit memory element, wherein the amount of current the second current mirror sinks from the OTP bit memory element is proportional to the second reference current; and a comparator operable to compare the voltage at the current output of the OTP bit memory element to a threshold voltage, and operable to output a logical “1” if said voltage is higher than the threshold voltage, and operable to output a logical “0” if said voltage is lower than the threshold voltage.
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