MEMORY PAGE BUFFER

摘要

Various embodiments address various difficulties with source side sensing difficulties in various memory architectures, such as 3D vertical gate flash and multilevel cell memory. One such difficulty is that with source side sensing, the signal amplitude is significantly smaller than drain side sensing. Another such difficulty is the noise and reduced sensing margins associated with multilevel cell memory. In some embodiments the bit line is selectively discharged prior to applying the read bias arrangement.

主权项

1. A method of a making a memory device, comprising:
providing a plurality of memory cells including a memory cell selected for programming; providing a plurality of conductive lines coupled to the memory cells, the plurality of conductive lines including a first conductive line and a second conductive line; and providing a control circuit applying, during a same period of programming the memory cell selected for programming, a first plurality of pulses to the first conductive line and a second plurality of pulses to the second conductive line during a same period.