发明名称 パルス幅延長回路および方法
摘要 A pulse stretching circuit having a pulse delay circuit for receiving an input pulse signal and for outputting a delay pulse signal, and a pulse adjustment circuit, connected to the pulse delay circuit, receiving the input pulse signal and the delay pulse signal and for outputting an output pulse signal having a pulse width longer than a pulse width of the input pulse signal. The pulse adjustment circuit causes a leading edge of the output pulse signal in response to a leading edge of the input pulse signal, keeps a state in which the output pulse signal is displaced with the leading edge thus caused longer than a total time of times for both pulse widths of the input pulse signal and the delay pulse signal, and causes a trailing edge of the output pulse signal in response to a trailing edge of the delay pulse signal.
申请公布号 JP5839968(B2) 申请公布日期 2016.01.06
申请号 JP20110264098 申请日期 2011.12.01
申请人 インターナショナル・ビジネス・マシーンズ・コーポレーションINTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 山田 玄;石井 正俊;宮武 久忠
分类号 H03K5/06;H03K5/1534 主分类号 H03K5/06
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