发明名称 |
Receiving device and correlation integrating method |
摘要 |
In a baseband processing circuit unit, a sample memory stores a received data sequence obtained by sampling a signal received by an RF receiving circuit unit at a given sampling time interval. A data sequence estimating unit estimates an estimated data sequence, which is obtained when the received signal is sampled at a sampling time shifted by a given shift time from the sampling time of the received data sequence, on the basis of the received data sequence stored in the sample memory. A correlation operation unit performs a correlation operation on the estimated data sequence estimated by the data sequence estimating unit 22 and a replica code. An integration unit integrates the correlation operation result from the correlation operation unit at a given integration time interval. |
申请公布号 |
US9229113(B2) |
申请公布日期 |
2016.01.05 |
申请号 |
US201313927047 |
申请日期 |
2013.06.25 |
申请人 |
Seiko Epson Corporation |
发明人 |
Terashima Maho |
分类号 |
G01S19/24;H04L7/00;G01S19/30 |
主分类号 |
G01S19/24 |
代理机构 |
Kilpatrick Townsend & Stockton LLP |
代理人 |
Kilpatrick Townsend & Stockton LLP |
主权项 |
1. A receiving device comprising:
a receiving circuit that receives a satellite signal from a positioning satellite; a storage circuit that stores a received data sequence obtained by sampling the signal received by the receiving circuit at a given sampling time interval, the sampling time interval being an amount of time between each successive sample; an estimation circuit that estimates an estimated data sequence, which is obtained when the received signal is sampled at a sampling time shifted by a given shift time from the sampling time of the received data sequence, based on the received data sequence, wherein the shift time is less than the sampling time interval; a correlation operation circuit that performs a correlation operation on the estimated data sequence and a replica code; and an integration circuit that integrates the correlation operation result in the correlation operation circuit at a given integration time interval. |
地址 |
Tokyo JP |