发明名称 |
Vector sum circuit for digitally controlled wideband phase shifter |
摘要 |
A vector sum circuit for producing a radio frequency (RF) output at a selectable phase offset includes an RF input configured to receive a differential pair RF input. A quadrature network produces an additional pair of RF inputs whose phase is advanced 90 degrees (90°) with reference to the first differential pair RF input, thereby producing four RF input signals offset at 0°, 90°, 180° and 270°. For each RF input signal, a set of three cascodes, having a plurality of NPN transistors and each emitter being commonly connected to an RF input. The first cascode steers current to a first output node, the second cascode steers current to a second output node and the third cascode shunts current to the voltage rail. By selectively steering current from the quadrature RF inputs to a selected output, an output signal having a desired phase shift is achieved. |
申请公布号 |
US9231559(B1) |
申请公布日期 |
2016.01.05 |
申请号 |
US201213706112 |
申请日期 |
2012.12.05 |
申请人 |
Lockheed Martin Corporation |
发明人 |
Davis Brandon R. |
分类号 |
H03H11/16 |
主分类号 |
H03H11/16 |
代理机构 |
Howard IP Law Group, PC |
代理人 |
Howard IP Law Group, PC |
主权项 |
1. A vector sum circuit for producing a radio frequency (RF) output at a selectable phase offset, comprising:
an RF input configured to receive a differential pair RF input; a quadrature network configured to produce an additional pair of RF inputs whose phase is advanced 90 degrees (90°) with reference to the differential pair RF input, thereby producing four RF input signals offset at 0°, 90°, 180° and 270°; for each RF input signal, a set of three cascodes, each cascode comprising a plurality of NPN transistors, wherein an emitter electrode of each NPN transistor in each cascode is commonly connected to a corresponding RF input; a first output terminal connected to a collector electrode of each NPN transistor in a first cascode of the set of three cascodes for each RF input; a second output terminal connected to a collector electrode of each NPN transistor in a second cascode of the set of three cascodes for each RF input; and a voltage rail connected to a collector electrode of each NPN transistor in a third cascode of the set of three cascodes for each RF input, wherein a first output from said first output terminal and a second output from said second output terminal combine to define an output signal that is a vector addition of said four RF input signals. |
地址 |
Bethesda MD US |