Non-volatile memory with negative bias

摘要

A memory system with improved power consumption and operation speed. A memory system performs a data read operation in a low power read mode to improve operation speed and reduce power consumption by biasing bit cells in the memory system at a negative voltage. The use of the negative voltage minimizes changing of voltages of the bit cells. Additionally, the memory system performs data read operation in a margin read mode to improve accuracy of the reading by biasing the bit cells at a positive voltage.

主权项

1. A non-volatile memory system, comprising:
a plurality of bit cells structured in a row with a control line, a word line, and a plurality of bit lines, each bit line associated with a corresponding bit cell from the plurality of bit cells, the control line configured to:
couple the word line and a selected bit line from the plurality of bit lines to read a content in a bit cell associated with the selected bit line responsive to the control line supplied with a first voltage, anddecouple the word line and the plurality of bit lines to not read contents in the plurality of bit cells responsive to the control line supplied with a second voltage; and a bit line controller coupled to the plurality of bit lines and to bias the selected bit line from the plurality of bit lines at a third voltage that is lower than the second voltage to read the content in the bit cell associated with the selected bit line in a first mode.