Digitally controlled oscillator calibration circuit and method

摘要

A calibration circuit for a DCO includes a signal-conditioning module configured for (i) receiving at input an oscillating signal generated by the DCO and a reference signal, both designed to oscillate between a high logic value (“1”) and a low logic value (“0”), and (ii) detecting a respective first and second stable logic value of the reference signal and of the oscillating signal; and a period-to-voltage converter module coupled to the signal-conditioning module and configured for (iii) generating a difference signal identifying a difference between the period of the reference signal and the period of the oscillating signal, and (iv) controlling, on the basis of the difference signal, the DCO so as to conform the duration of the period of the oscillating signal to the duration of the period of the reference signal. Likewise described is a calibration method implemented by the calibration circuit.

主权项

1. A device, comprising:
signal conditioning circuitry configured to receive an oscillating binary signal and a reference binary signal and to output an intermediate oscillating binary signal, an intermediate reference binary signal and a control signal indicative of a stable condition of at least one of the binary signals; and a converter circuit coupled to the signal conditioning circuitry and configured to:
detect transition edges of the intermediate oscillating binary signal and the intermediate reference binary signal; andgenerate first and second control signals indicative of time intervals between edge transitions based on detected edge transitions and the control signal indicative of the stable condition of the at least one of the binary signals, wherein the signal conditioning circuitry is configured to: detect a logic value of the oscillating binary signal and a logic value of the reference binary signal; if the detected logic value of the oscillating binary signal is equal to the detected logic value of the reference binary signal, generate the intermediate oscillating binary signal based on the oscillating binary signal and generate the intermediate reference binary signal based on the reference binary signal; and if the detected logic value of the oscillating binary signal is not equal to the detected logic value of the reference binary signal, generate the intermediate oscillating binary signal based on an inverted oscillating binary signal and generate the intermediate reference binary signal based on the reference binary signal.