Logic compatible RRAM structure and process

摘要

A memory cell and method including a first electrode conformally formed through a first opening in a first dielectric layer, a resistive layer conformally formed on the first electrode, a spacing layer conformally formed on the resistive layer, a second electrode conformally formed on the resistive layer, and a second dielectric layer conformally formed on the second electrode, the second dielectric layer including a second opening. The first dielectric layer is formed on a substrate including a first metal layer. The first electrode and the resistive layer collectively include a first lip region that extends a first distance beyond the first opening. The second electrode and the second dielectric layer collectively include a second lip region that extends a second distance beyond the first opening. The spacing layer extends from the second distance to the first distance. The second electrode is coupled to a second metal layer using a via that extends through the second opening.

主权项

1. A memory cell formed in a semiconductor device, the memory cell comprising:
a first electrode conformally formed through a first opening in a first dielectric layer, the first dielectric layer being formed on a substrate including a first metal layer, the first opening being configured to allow physical contact between the first electrode and the first metal layer; a resistive layer conformally formed on the first electrode; a spacing layer conformally formed on the resistive layer; a second electrode conformally formed on the resistive layer; and a second dielectric layer conformally formed on the second electrode, the second dielectric layer including a second opening; wherein:
the first electrode and the resistive layer collectively include a first lip region that extends laterally over the first dielectric layer by a first distance beyond a region defined by the first opening;the second electrode and the second dielectric layer collectively include a second lip region that extends laterally over the resistive layer by a second distance beyond the region defined by the first opening, the second distance being smaller than the first distance;the spacing layer extends laterally over the resistive layer from the second distance to the first distance;the second electrode is coupled to a second metal layer using a via that extends through the second opening; andthe first lip region is at a first height different from a second height of the corresponding first electrode and the resistive layer located in the region defined by the first opening.