Enhanced dislocation stress transistor

摘要

A device is provided. The device includes a transistor formed on a semiconductor substrate, the transistor having a conduction channel. The device includes at least one edge dislocation formed adjacent to the conduction channel on the semiconductor substrate. The device also includes at least one free surface introduced above the conduction channel and the at least one edge dislocation.

主权项

1. A device comprising:
a gate electrode on a substrate, wherein the substrate comprises silicon; a first spacer adjacent to a first side of the gate electrode; a second spacer adjacent to a second side of the gate electrode; a channel region in the substrate, wherein the channel region comprises a portion of the substrate below the gate electrode; a first dislocation adjacent a portion of a source region of the substrate; a second dislocation adjacent a portion of a drain region of the substrate; and wherein at least a portion of one of a raised source region adjacent to the first spacer, and at least a portion of a raised drain region adjacent to the second spacer, provides a free surface located higher than at least a portion of the channel region and higher than the first and second dislocations.