发明名称 Implementing rate controls to limit timeout-based faults
摘要 Embodiments are directed to implementing rate controls to limit faults detected by timeout and to learning and adjusting an optimal timeout value. In one scenario, a computer system identifies cloud components that have the potential to fail within a time frame that is specified by a timeout value. The computer system establishes a number of components that are allowed to fail during the time frame specified by the timeout value and further determines that the number of component failures within the time frame specified by the timeout value has exceeded the established number of components that are allowed to fail. In response, the computer system increases the timeout value by a specified amount of time to ensure that fewer than or equal to the established number of components fail within the time frame specified by the timeout value.
申请公布号 US9229839(B2) 申请公布日期 2016.01.05
申请号 US201313737430 申请日期 2013.01.09
申请人 Microsoft Technology Licensing, LLC 发明人 Singh Abhishek;Raghavan Srikanth;Mani Ajay;Syed Saad
分类号 G06F11/00;G06F11/34;G06F11/07 主分类号 G06F11/00
代理机构 代理人 Tabor Ben;Valio Harri;Minhas Micky
主权项 1. A computer system comprising the following: one or more processors; system memory; one or more computer-readable storage media having stored thereon computer-executable instructions that are executable by the one or more processors to cause the computing system to implement rate controls to limit faults detected by timeout and to instantiate the following; a monitor module that identifies one or more hardware or software components that have a potential to experience a timeout-based failure within a time frame, wherein the timeout-based failure is a failure in which the one or more hardware or software components is unresponsive for a specified time or takes longer to perform a task than the specified time, wherein the specified time is specified by a timeout value;a component failure module that establishes a number of timeout-based failures the one or more hardware or software components are allowed to suffer during the time frame;a determining module that determines that the number of timeout-based failures suffered by the one or more hardware or software components within the time frame has exceeded the established number; anda timeout value adjusting module that increases the timeout value by a specified amount of time to ensure that fewer than or equal to the established number of timeout-based failures occur within the time frame.
地址 Redmond WA US