发明名称 Automatic computer code parallelization
摘要 A method for computer code parallelization, comprising: providing sequential computer code by a user; defining structure of the sequential computer code, the structure comprises a plurality of code processes; generating automatically a plurality of parallelized computer codes corresponding to the sequential computer code, each having different configuration of parallelizing the plurality of code processes; running the plurality of parallelized computer codes on a multi-core processing platform; evaluating performance of the processing platform during running of each of the parallelized computer codes; and ranking each of the parallelized computer codes according to the performance evaluation.
申请公布号 US9229690(B2) 申请公布日期 2016.01.05
申请号 US201414458301 申请日期 2014.08.13
申请人 METIS-MP Ltd. 发明人 Shoham Efraim;Meir Gil-Ad;Maximov Evgeny;Segal Ram
分类号 G06F9/44;G06F9/45;G06F11/34 主分类号 G06F9/44
代理机构 代理人
主权项 1. A method for computer code parallelization, comprising: providing sequential computer code by a user; defining structure of said sequential computer code, said structure comprises a plurality of code processes; generating automatically a plurality of parallelized computer codes corresponding to said sequential computer code, each having different configuration of parallelizing said plurality of code processes; running said plurality of parallelized computer codes on a multi-core processing platform; evaluating performance of said processing platform during running of each of said parallelized computer codes; ranking each of said parallelized computer codes according to said performance evaluation; presenting each of a plurality of processes of said sequential computer code as an execution graphic element in a schematic chart; presenting each of a plurality of output data blocks of said plurality of processes as a data structure graphic element of a corresponding execution graphic element in said schematic chart; presenting each of a plurality of dependencies between said plurality of processes as a dependency arrow between corresponding execution graphic elements in said schematic chart; identifying non-conflicting execution graphic elements according to said schematic chart; and generating at least one of said plurality of parallelized computer codes to correspond to said sequential computer code wherein processes presented by said non-conflicting execution graphic elements are paralleled.
地址 Nes Ziona IL