发明名称 Variable delay and setup time flip-flop
摘要 An apparatus is provided. The apparatus includes a flip-flop including an input configured to receive a setup time and delay control (SDC) signal, and an output buffer including first and second conductive paths. The second conductive path is non-conductive when the SDC signal has a first value at the input and is conductive when the SDC signal has a second value at the input. The apparatus includes a propagation delay sensor configured to estimate a propagation delay of the flip-flop, and, when the estimated propagation delay exceeds a threshold, supply the SDC signal having the second value to the input of the flip-flop.
申请公布号 US9231569(B2) 申请公布日期 2016.01.05
申请号 US201313749542 申请日期 2013.01.24
申请人 Freescale Semiconductor, Inc. 发明人 Allende Alexandro Giron
分类号 H03K3/00;H03K3/037 主分类号 H03K3/00
代理机构 Quarles & Brady LLP 代理人 Quarles & Brady LLP
主权项 1. An apparatus, comprising: a flip-flop including: a first input configured to receive a first setup time and delay control (SDC) signal,a second input configured to receive a second SDC signal, andan output buffer including first, second, and third conductive paths, the second conductive path being non-conductive when the first SDC signal has a first value at the first input and being conductive when the first SDC signal has a second value at the first input and the third conductive path being conductive when the second SDC signal has a third value at the second input; and a propagation delay sensor configured to: estimate a propagation delay of the flip-flop,compare the propagation delay to a first threshold and a second threshold, andwhen the estimated propagation delay exceeds the first threshold, supply the first SDC signal having the second value to the first input of the flip-flop and when the estimated propagation delay exceeds the second threshold, supply the second SDC signal having the third value to the second input of the flip-flop.
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